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  aod2606/AOI2606 general description product summary v ds i d (at v gs =10v) 46a r ds(on) (at v gs =10v) < 6.8m? applications 100% uis tested 100% rg tested symbol 60v n-channel mosfet orderable part number package type form minimum order quantity 60v ? trench power mv mosfet technology ? low r ds(on) ? low gate charge ? optimized for fast-switching applications absolute maximum ratings t a =25c unless otherwise noted maximum units AOI2606 to-251a tube 4000 parameter aod2606 to-252 tape & reel 2500 ? synchronous rectification in dc/dc and ac/dc conv erters ? industrial and motor drive applications g g d d s s top view bottom view to-251a ipak g s d g s d top view to-252 dpak bottom view g d s d d symbol v ds v gs i dm i as avalanche energy l=0.1mh c e as v ds spike v spike t j , t stg symbol t 10s steady-state steady-state r q jc units junction and storage temperature range -55 to 175 typ p dsm w t a =25c 2.5 power dissipation a mj 180 14 46 maximum junction-to-ambient a c/w r q ja 16 41 20 thermal characteristics parameter max t a =70c 1.6 c va 20 v maximum units parameter drain-source voltage continuous drain current g maximum junction-to-case c/w c/w maximum junction-to-ambient a d 0.8 50 1.0 w i d v a 60 a 60 72 150 gate-source voltage pulsed drain current c 36 184 i dsm 11 t a =25c t a =70c t c =25c t c =100c t c =25c avalanche current c continuous drain current power dissipation b 75 t c =100c 10s p d rev.1.0: december 2014 www.aosmd.com page 1 of 6
symbol min typ max units bv dss 60 v v ds =60v, v gs =0v 1 t j =55c 5 i gss 100 na v gs(th) gate threshold voltage 2.5 3.0 3.5 v 5.6 6.8 t j =125c 8.8 10.6 g fs 75 s v sd 0.7 1 v i s 46 a c iss 4050 pf c oss 345 pf c rss 16.8 pf r g 0.3 0.65 1.0 ? q g (10v) 53 75 nc q g (4.5v) 22 31 nc q gs 17 nc q gd 5 nc t d(on) 18 ns t r 20 ns t d(off) 33 ns t f 4 ns t rr 26 ns m? v gs =10v, v ds =30v, i d =20a total gate charge maximum body-diode continuous current g input capacitance diode forward voltage dynamic parameters gate source charge reverse transfer capacitance v gs =0v, v ds =30v, f=1mhz output capacitance forward transconductance gate resistance v ds =5v, i d =20a v gs =10v, i d =20a gate-body leakage current v ds =v gs, i d =250 m a turn-on delaytime body diode reverse recovery time turn-off delaytime turn-off fall time v gs =10v, v ds =30v, r l =1.5 w , r gen =3 w i f =20a, di/dt=500a/ m s turn-on rise time gate drain charge total gate charge switching parameters f=1mhz r ds(on) i s =1a,v gs =0v electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions i dss a zero gate voltage drain current drain-source breakdown voltage i d =250 m a, v gs =0v static drain-source on-resistance v ds =0v, v gs =20v t rr 26 ns q rr 125 nc this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. body diode reverse recovery charge body diode reverse recovery time i f =20a, di/dt=500a/ m s i f =20a, di/dt=500a/ m s a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. the power dissipation p dsm is based on r q ja and the maximum allowed junction temperature of 150 c. the value in any given application depends on the user's specific board design, and the maximu m temperature of 175 c may be used if the pcb allows it. b. the power dissipation p d is based on t j(max) =175 c, using junction-to-case thermal resistance, and i s more useful in setting the upper dissipation limit for cases where additional heatsi nking is used. c. single pulse width limited by junction temperatu re t j(max) =175 c. d. the r q ja is the sum of the thermal impedance from junction t o case r q jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case t hermal impedance which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of t j(max) =175 c. the soa curve provides a single pulse rating. g. the maximum current rating is package limited. h. these tests are performed with the device mounte d on 1 in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. rev.1.0: december 2014 www.aosmd.com page 2 of 6
typical electrical and thermal characteristics 0 20 40 60 80 100 120 2 3 4 5 6 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 0 2 4 6 8 10 0 5 10 15 20 25 30 r ds(on) (m w ) i d (a) figure 3: on - resistance vs. drain current and gate 0.8 1 1.2 1.4 1.6 1.8 2 0 25 50 75 100 125 150 175 200 normalized on-resistance temperature (c) figure 4: on - resistance vs. junction temperature v gs =10v i d =20a 25 c 125 c v ds =5v v gs =10v 0 20 40 60 80 100 120 0 1 2 3 4 5 i d (a) v ds (volts) figure 1: on-region characteristics (note e) v gs =4v 4.5v 6v 10v 5v d figure 3: on - resistance vs. drain current and gate voltage (note e) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 1.2 i s (a) v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c figure 4: on - resistance vs. junction temperature (note e) 2 4 6 8 10 12 14 16 2 4 6 8 10 r ds(on) (m w ) v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) i d =20a 25 c 125 c rev.1.0: december 2014 www.aosmd.com page 3 of 6
typical electrical and thermal characteristics 0 2 4 6 8 10 0 10 20 30 40 50 60 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 1000 2000 3000 4000 5000 0 10 20 30 40 50 60 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss 0 100 200 300 400 500 0.0001 0.001 0.01 0.1 1 10 100 1000 power (w) pulse width (s) c oss c rss v ds =30v i d =20a t j(max) =175 c t c =25 c 10 m s 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 1000 i d (amps) v ds (volts) v > or equal to 4.5v 10 m s 1ms dc r ds(on) limited t j(max) =175 c t c =25 c 100 m s 10ms pulse width (s) figure 10: single pulse power rating junction-to- case (note f) 0.01 0.1 1 10 1e-05 0.0001 0.001 0.01 0.1 1 10 100 1000 z q jc normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) single pulse d=t on /t t j,pk =t c +p dm .z q jc .r q jc t on t p dm in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse v gs > or equal to 4.5v figure 9: maximum forward biased safe operating area (note f) r q jc =1.0 c/w rev.1.0: december 2014 www.aosmd.com page 4 of 6
typical electrical and thermal characteristics 0 50 100 150 200 0 25 50 75 100 125 150 175 power dissipation (w) t case ( c) figure 13: power de-rating (note f) 0 10 20 30 40 50 60 0 25 50 75 100 125 150 175 current rating i d (a) t ( c) 1 10 100 1000 10000 1e-05 0.001 0.1 10 1000 power (w) pulse width (s) t a =25 c 1 10 100 1000 1 10 100 1000 i ar (a) peak avalanche current time in avalanche, t a ( m s) figure 12: single pulse avalanche capability (note c) t a =25 c t a =150 c t a =100 c t a =125 c 0.001 0.01 0.1 1 10 0.0001 0.001 0.01 0.1 1 10 100 1000 z q ja normalized transient thermal resistance pulse width (s) figure 16: normalized maximum transient thermal imp edance (note h) single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse t case ( c) figure 14: current de-rating (note f) pulse width (s) figure 15: single pulse power rating junction-to- ambient (note h) r q ja =50 c/w rev.1.0: december 2014 www.aosmd.com page 5 of 6
- + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off l unclamped inductive switching (uis) test circuit & waveforms vdd vgs id vgs rg dut - + vdc l vgs vds id vgs bv i ig vgs - + vdc dut l vds vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar dss 2 e = 1/2 li di/dt i rm rr vdd vdd q = - idt ar ar t rr rev.1.0: december 2014 www.aosmd.com page 6 of 6


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